The present invention relates to a plasma display device, and more particularly to a plasma display device in which the reset problem is improved.
Plasma display devices are widely used as large screen slim TVs. Recently plasma display devices are attracting particular attention as full high vision supported-slim TVs.
Driving of the panel of a plasma display device includes: a reset period when the wall charge state of the cells is reset, an address period when display electrodes are scanned and the display image is written in the cells, and a sustain period when a sustain discharge is generated for a plurality of times in the cells written in the address period, so that high brightness emission is performed. A field period for displaying one image includes a plurality of subfields, and each subfield has a reset period, address period and sustain period. In one field period, a multi-grayscale display is performed by making the sustain discharge count in the sustain period of each subfield different, and combining the subfields which turn ON.
For a plasma display device it has been proposed that the wall charge state of the cells which are turned ON is reset in the reset period, and an slope pulse (or ramp waveform pulse; the same applies hereinafter) is applied to the display electrodes to generate a micro-discharge so as to adjust the wall charge amount. Examples are disclosed in JP 2003/15602, JP 2003/157043, JP 2003/302931, JP 2004/004513, JP 2000/267625 and WO 2006/013658A1.
These patent documents disclose that a positive polarity slope pulse is applied to a Y electrode corresponding to a scan electrode, out of the display electrodes, and then a negative polarity slope pulse is applied, during the reset period.
Also WO 2006/013658A1 discloses that the drive voltage of the scan electrode or the drive voltage of the address electrode is decreased by utilizing the characteristic that the activation energy of the discharge gas increases and the drive voltage decreases as the drive load amount increases.
As mentioned above, in the reset period, a positive polarity slope pulse is applied between the Y electrode and X electrode constituting the display electrode to reset the wall charge state on the X and Y electrodes and address electrodes on the cell, and a negative polarity slope pulse is applied between the Y electrode and X electrode so as to adjust the wall charge amount to an optimum amount. By making the wall charge amount on each electrode to be an optimum amount, the address discharge can be generated between the address electrode and Y electrode only in the cells to be turned ON, and discharge can also be generated between the X and Y electrodes, in the subsequent address period. In the sustain period, a sustain pulse is applied between the X and Y electrodes for a predetermined number of times, then a sustain discharge is repeatedly generated in the ON cells written in the address period.
On the other hand, there are two types of reset discharge: an all cell reset, which resets all the cells to be scanned in the corresponding field, regardless whether the cell is ON or OFF in the previous subfield; and an ON cell reset, which resets only the cells which turned ON in the previous subfield. Performing the all cell restart in all subsubfield is ideal, but the scale of background emission becomes high, which drops contrast. Therefore the all cell reset is performed only in a part of subfield in the field period, and the ON cell reset is performed in the rest of the subfield in the field period.
However, in the plasma display device, the temperature of the panel rises if the sustain discharge count increases. And if the temperature of the panel increases, charge leaks and weak discharges in semi-selected cells in the address period become more active. The semi-selected state is a state where the scan pulse is not applied to the Y electrode, which is a scan electrode, but the address pulse is applied to the address electrode, and in particular cells on the Y electrode, which are scanned at the end of the address period, enter a semi-selected state for a long time.
In a cell in the semi-selected state, a positive voltage is applied to the address electrode, so charges on the address electrode easily leak into the discharge space, and a weak discharge tends to occur between the address electrode and Y electrode. Therefore in the cell in the semi-selected state, charges on the address electrode and charges on the Y electrode decrease, and a normal address discharge is not generated between the address electrode and Y electrode, that is, a turning OFF error occurs when the cell is selected thereafter.
In a cell where such a turning OFF error occurred, an address discharge is not generated until the wall charge state on the three electrodes is reset by the all cell reset, which causes a display failure.